Field of the Invention
The invention relates to a magnetoresistive memory and to a method for reading memory cells in a magnetoresistive memory such as this.
Magnetoresistive memories represent an alternative to conventional DRAM and SRAM memories as well as to non-volatile memories, for example flash or EEPROM. They include a configuration of memory cells to which bit lines and word lines are connected. Each individual memory cell in a magnetoresistive memory includes two magnetic elements that are isolated from one another by a dielectric. One of the magnetic elements is hard-magnetic and its magnetic flux direction is thus predetermined, while the other is soft-magnetic and its orientation can be reversed by applying suitable switching currents to the bit lines and word lines.
The dielectric that is disposed between the two magnetic elements is a so-called tunnel dielectric, for example a layer that is suitable for use as a tunnel dielectric and that has a thickness of 2 nm. The tunnel dielectric has, as a special feature, an electrical resistance that is dependent on the magnetic field that surrounds it. If both magnetic elements on both sides of the tunnel dielectric are oriented in the same direction, the dielectric has a different resistance value to that when the magnetic flux directions of the two magnetic elements are inverted with respect to one another.
The respective present value of the resistance in the tunnel dielectric can be determined by applying a suitable voltage to the bit lines and to the word lines, thus making it possible to deduce the orientation of the magnetic elements. Overall, this therefore results in a state system that operates in a binary manner and is thus suitable for storing digital information. In addition to the resistance that is inherent from the function, one specific type of magnetoresistive memory cells includes a diode function.
In a configuration of memory cells such as this, it is possible, for example, to provide bit lines and word lines that in each case run parallel above and below the actual memory cells, and that are in turn configured at right angles to one another. The bit lines and word lines can then be connected at the edge of the memory cell configuration to additional circuits for writing and reading.
Arrays of MRAM bulk memories have not yet so far appeared as products. Only relatively small configurations (arrays) are available, which are generally based on the “current in-plane” principle, while the “current perpendicular to plane” principle has better prospects for bulk memory applications. Magnetoresistive memories offer certain fundamental advantages, such as simple manufacture, nonvolatile data storage and good shrink suitability. Their suitability for use as bulk memories depends to a major extent on whether sufficiently large memory cell blocks can be produced. Configurations (arrays) of competitive bulk memories must satisfy the following requirements at the same time:                The array must allow a size of (several hundred)×(several hundred) memory cells.        The read signal must have a specific minimum magnitude in order to allow sufficiently reliable assessment.        
Examples of Semiconductor Memories:
DRAMs require approximately 100-150 mV. They carry out a voltage assessment at the array edge by using read amplifiers that are seated in the pitch.
Flash memories (embedded) require approximately 10 μA. They carry out a current assessment using read amplifiers in the peripheral area.
SRAMs operate with on currents of about 150 μA and negligible off currents. They achieve array access times of 600 ps-1.2 ns.
Precise values cannot be stated a priori for MRAM, and it is necessary to check on a case-by-case basis whether the read signal is sufficient for reliable assessment that is sensitive to interference.
The energy consumption for reading should be comparable to or less than that for DRAM (depending on the architecture, 1 pJ-1 nJ). These requirements must also be placed on any bulk storage application for MRAMS.